This article introduces first of possibilities how to realize Gray Code Counter. I start with facts that I'm able to realize:
- "plus one" logic in binary code
- binary to gray logic
- gray to binary logic
- synchronous design techniques to be used (flip-flops) with asynchronous reset
Each clock the "current" result is held by the register (register output) and "next" result is at the end of combinatorial logic (register input).
Figure 1 provides block diagram of the above description:

Figure 1 - Gray Code Counter
Combinatorial logic parts (gray2logic, binary2logic, +1 logic) to be explained in other articles :)
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